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Debug systems

The ARM7TDMI-S forms one component of a debug system that interfaces from the high‑level debugging that you perform to the low‑level interface supported by the ARM7TDMI-S

A debug system typically has three parts:

•          The debug host
•          The protocol converter
•          The ARM7TDMI-S.

The debug host and the protocol converter are system‑dependent.

The Debug Host:

The debug host is a computer that is running a software debugger such as the ARM Debugger for Windows (ADW). The debug host allows you to issue high‑level commands such as setting breakpoints or examining the contents of memory.

The Protocol Converter:

The protocol converter interfaces between the high-level commands issued by the debug host and the low‑level commands of the ARM7TDMI-S JTAG interface. Typically it interfaces to the host through an interface such as an enhanced parallel port.

The ARM7TDMI-S

The ARM7TDMI-S has hardware extensions that ease debugging at the lowest level. The debug extensions:

•          allow you to stall the core from program execution
•          examine the core internal state
•          examine the state of the memory system
•          resume program execution.

The major blocks of the ARM7TDMI-S are:

•          The ARM CPU core, with hardware support for debug.
•          The EmbeddedICE macrocell. This is a set of registers and comparators used to generate debug exceptions (such as breakpoints). This unit is described in About EmbeddedICE.
•          The TAP controller . This controls the action of the scan chains using a JTAG serial interface.



Fig(Debug System)